1. Field of the Invention
This invention relates to the field of high power semiconductor switches.
2. Description of the Related Art
Semiconductor devices are increasingly required to accommodate high currents and/or high voltages without failing. Many high power applications call for the use of a semiconductor switch which is required to conduct a large current when turned on, and to block a high voltage when off.
One device used in such applications is the power metal-oxide-semiconductor field-effect transistor (MOSFET). As discussed in J. Baliga, Power Semiconductor Devices, PWS Publishing Co. (1996) at p. 426, a power MOSFET exhibits excellent fast switching capability and safe-operating-area. When designed to block relatively low voltages (less than 200 volts), the power MOSFET has a low on-resistance. However, on-resistance increases very rapidly when its breakdown voltage is increased. This makes the on-state power losses unacceptable where high DC supply voltages are used.
One approach to improving blocking voltage while maintaining a low on-resistance is discussed in L. Lorenz et al., xe2x80x9cImproved MOSFETxe2x80x94An Important Milestone Toward a New Power MOSFET Generationxe2x80x9d, PCIM (Sept. 1998), pp. 14-22. This device inserts rectangular p-doped regions into the drift layer. When turned off, the rectangular p-type structures cause the reverse voltage to be built up not only vertically, but horizontally as well, resulting in a 3-D folded structure. This enables a reduction in layer thickness while obtaining an increase in blocking voltage.
The improved MOSFET described above suffers from several drawbacks, however. The fabrication of the device is very tedious and complex, and therefore costly, requiring multiple photolithography, implantation, and epitaxial growth steps. Furthermore, the maximum blocking voltage demonstrated to date has been 600 volts rendering the device unusable for many applications which require higher supply voltages.
Another approach which has been explored to improve blocking voltage while maintaining low on-resistance has been the fabrication of FETs using silicon carbide (SiC). SiC has a wider bandgap than does silicon, giving it a xe2x80x9ccritical electric fieldxe2x80x9d xe2x80x94i.e., the peak electric field that a material can withstand without breaking downxe2x80x94that is an order of magnitude higher than that of silicon (Si). This allows much higher doping and a much thinner drift layer for a given blocking voltage, resulting in a very low specific on-resistance in SiC-based devices.
Unfortunately, SiC devices developed to date exhibit severe commercialization constraints. One such device is described in xe2x80x9cHigh-Voltage Accumulation-Layer UMOSFET""s in 4H-SiCxe2x80x9d, IEEE Electron Device Letters, Vol. 19, No. 12 (December 1998), pp. 487-489. This SiC-based device employs a UMOS structure, with an accumulation channel formed on the sidewalls of the trench by epitaxial growth to attain enhancement mode operation. It requires an additional epitaxial layer under the p-base to promote current spreading and achieve low on-resistance. The doping levels and the thicknesses of the sidewall epilayer and the epilayer under the p-base must be tightly controlled to achieve an enhancement mode device with low on-resistance. These demands result in a very complex fabrication process which is unsuitable for large-scale manufacturing.
A high power unipolar field-effect transistor (FET) switch is presented which overcomes the problems noted above. The switch is particularly well-suited to high power switching applications, providing a very low on-resistance, a high blocking voltage, and negligible switching loss.
An Nxe2x88x92 drift layer is on an N+ layer which provides an ohmic contact to the drift layer (X+ denotes a carrier concentration of at least 1xc3x971018/cm3, Xxe2x88x92 denotes a carrier concentration of less than 5xc3x971016/cm3). A layer of metal on the N+ layer provides a drain connection for the FET. A pair of trenches are recessed into the drift layer opposite the N+ layer; the trenches are separated by a mesa region comprised of that portion of the Nxe2x88x92 drift layer found between the trenches. Oxide layers line the walls and bottom of each trench, which are each filled with a conductive material. A second layer of metal connects the conductive material in each of the trenches together to provide a gate connection for the FET. A shallow P region extends from the bottom of each trench into the drift layer and around the corners formed at the intersections of its respective trench""s oxide side-walls and its oxide bottom. A second N+ layer is on the Nxe2x88x92 drift layer within the mesa region which provides an ohmic contact to the mesa region, and a third layer of metal contacts the second N+ layer to provide a source connection for the FET.
The structure is preferably arranged so that the switch operates as a xe2x80x9cnormally-offxe2x80x9d device; i.e., current is prohibited from flowing between drain and source when the voltage applied to the gate connection is zero. This is accomplished by making the width and doping concentration of the mesa region such that, with no voltage applied to the gate, the mesa region is completely depleted by the potentials created by the work function difference between the conductive material and the N+ material in the mesa region. The structure can also be arranged to operate as a xe2x80x9cnormally-onxe2x80x9d device by making the mesa region so wide or its doping concentration so high that a negative gate voltage is required to completely deplete the mesa region.
When a positive gate voltage is applied, the mesa region is undepleted and accumulation channels are created adjacent to the oxide side-walls of the trenches. The gate voltage modulates the Nxe2x88x92 drift layer within the mesa region, thereby turning the switch on and allowing current to flow between the drain and the source connections via the mesa region and the accumulation channels.
The creation of the accumulation channels, in combination with the modulation of the mesa region and the use of ohmic contacts, enables the unipolar FET switch to have a low on-resistance. Since the device is unipolar, there are no minority carriers to recombine during turn-off, and thus the device""s switching speed can be very fast. This also enables the switch to exhibit very low switching lossesxe2x80x94i.e., very little power is dissipated when transitioning from an on-state to an off-state. The shallow P regions surrounding the lower corners of the trench structures protect the corners from high electric fields and thereby increase the switch""s breakdown voltage and enhance the reliability of the trench oxide.
The switch""s Nxe2x88x92 drift and N+ layers may be conventional silicon (Si), but are preferably made from semiconductor materials having a bandgap voltage higher than that of silicon, such as silicon carbide (SiC), gallium nitride (GaN), gallium arsenide (GaAs), or diamond. A material""s critical field is proportional to its bandgap voltage. Thus, the use of a wide bandgap material enables the use of a drift layer that, for the same blocking voltage, is much thinner than would be necessary with an Si implementationxe2x80x94an order of magnitude thinner for an SiC implementation. Furthermore, the doping concentration a material is capable of attaining is proportional to its critical field. Thus, these higher-critical-field materials also permit the drift region""s doping density to be much higher than an Si version capable of providing the same blocking voltage (an order of magnitude higher for an SiC implementation), which further reduces the device""s on-resistance to very low level. Use of a wide bandgap material also enables the device""s reverse leakage current to be several orders of magnitude less than a comparable Si device, which serves to increase the temperature at which the switch can be operated.
The doping concentration in the mesa region is preferably less than it is in the portion of the Nxe2x88x92 drift layer below the mesa region. This makes it easier to completely deplete the mesa region, which in turn enables the use of a wider and easier to fabricate mesa region. However, due to the presence of the accumulation channels across the mesa region when the switch is on, the lower doping concentration has only a minor effect on the device""s on-resistance.
A number of structures are fabricated in parallel to provide a desired current carrying capacity. Devices per the present invention can carry currents of 50 A with a reverse blocking voltage in excess of 1200 volts, on a die size of only 0.1 cm2. These characteristics make the novel FET switch well-suited for high power applications.
Further features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.